Saturday, February 3, 2018

Simple Ayurvedic Health Tips

Simple Ayurvedic Health Tips

Here is a list of healthy tips quoted from Ayurveda
  1. Wake up early in the morning
  2. First thing in the morning have 1-2 glass of lukewarm water
  3. Drink approximately 750 ml of water in the early hours of the day to keep the three bio-energies i.e., Vata, Pitta and Kapha in track.
  4. Delay aging by exercising regularly.
  5. Walking is essential as part of daily routine.
  6. Massage before bath for total fitness and glowing skin.
  7. Eat a stomach filling breakfast, and cut down on the heavy dinner.
  8. The six tastes should be balanced in the diet for optimum health and nutrition. The six tastes are: sour, pungent, astringent, bitter, salty, sweet
  9. Include good forms of sugar like sugarcane, jaggery, red sugar, nolen gur, honey, dates
  10. Include good fat in your diet like desi ghee, coconut oil, sarson ka tail, nuts, seeds
  11. Include dietary fibre in the form of fresh fruits, vegetables, raw salads
  12. Eat Khichdi as one meal a day
  13. Boil four glasses of water till it is reduced to one glass. Sip this hot water decoction at bed-time to flush out wastes from the body.

How to reach Lansdowne from Delhi

Lansdowne is one of the closest hill station from Delhi.

You can reach Lansdowne by train or road. I personally took train.

1) Take train from Old Delhi railway station to Kotdwar Station. (A/C chair coach costs 375Rs only).

2) From Kotdwar take shared taxi or personal taxi. Shared taxi take 70Rs per passenger and personal reserved taxi takes 700 to 800Rs.

Lansdowne is about 250 Km from Delhi and roads are in good condition. So many people prefer taking their own car there.

Helpful sites while publishing android apps

Here are the list of sites I usually refer while publishing apps on play store :

1) Design your app icon :

2) Design your app feature graphic :

3) Step by step guide to publish application :

Thursday, February 1, 2018

How to save long term capital gain after budget 2018


Long Term Capital Gains Tax – FAQs

1.       What is the budget proposal on LTCG for equities?

Ans – So far, any LT Capital gains made on equities on Exchanges was exempt. The Govt has now proposed an 10% LTCG tax on gains made above Rs 1 Lakh

2.       When is the tax payable?

Ans – Since it is a Direct Tax proposal it will normally be applicable for the Assessment Year FY19-20 (Financial Year FY18-19). In other words, the LT Capital gains, of over Rs 1 Lakh, made for the year FY18-19 will be liable to tax at 10%.

3.       Does it mean that there is no LTCG for Assessment Year FY18-19 (Financial Year FY17-18)?

Ans – One needs to understand the exact proposal in fine print. However, it appears that any LTCG will not be applicable for FY18-19 on plain read. This question frankly needs greater degree of expert study.

4.       What is the relevance of the cut-off date of 31st Jan 2018?

Ans – The FM has proposed grandfathering of LT Capital gains upto 31st Jan 2018. Any incremental LT Capital gains after that will be counted as LT Capital gains for the new tax.

5.       What happens to my tax liability if I sell stocks starting today held for more than a year?

Ans – As for LT Capital gains made in Financial Year 17-18 (i.e sale upto 31st Mar 2018), it appears there is no tax. However, any sale made after 1st April 2018 will be liable to the new LTCG tax. One needs to segregate this LT capital gain into two parts

a) Part one – is LT Capital gains made upto 31st Jan 2018. This will be highest price of the stock on 31st Jan 2018 minus the cost of acquiring stock;

b) Part two – is LT Capital gains made after 31st Jan 2018. This will be sale price minus highest price of the stock on 31st Jan 2018.

While Part one will be exempt. It is the Part two that will be assessed as LT Capital gains (it can also be a Capital loss) for Tax. Tax on this will be computed at the rate of 10% (+ cess of 3%) only if exceeds Rs 1 Lakh

6.       What should be the strategy now on equity investments?

Ans – Any equity investor wishing to reduce the LT Capital gains tax liability can sell stocks starting today till 31st March 2018 and incur zero tax provided the holding period is more than a year. However, one can continue to buy equity shares without any hesitation. Any future sales after 31st March 2018 has to be judiciously chosen to minimize the tax liability. Assuming equity investments yield a return of 15% every year, an investment of Rs6.66L each year will rise to Rs7.66L in a year and gains booked thereof will be tax free. Even if the gains exceed 15% to say 25%, the LT gains Tax will be Rs6,667/- only

Saturday, January 27, 2018

Lenovo android phone not visible on android studio

My Lenovo K6 power was not visible on device chooser window. I did enable the developer option and usb debugging option. Even after that my phone was not visible on Android studio device chooser window. Then finally I followed following link and it worked :

Friday, January 19, 2018

Two Sum

Two Sum

Given an array of integers, return indices of the two numbers such that they add up to a specific target.
You may assume that each input would have exactly one solution, and you may not use the same element twice.

class Solution {
    vector<int> twoSum(vector<int>& nums, int target) {
        for (int i = 0; i< nums.size(); i++) {
            for (int j = i + 1; j < nums.size(); j++) {
                if (target == (nums[i] + nums[j]))  {
                    vector<int> v(2,0);
                    v[0] = i; v[1] = j;
                    return v;
Given nums = [2, 7, 11, 15], target = 9,

Because nums[0] + nums[1] = 2 + 7 = 9,
return [0, 1].

Hello world in System Verilog with line by line description

module top;

  initial begin
    $display("Hello World");


  • Line 1 (module top;) : A "module" is the basic design unit of System Verilog, "top" signifies the name of the module. Every statement in System Verilog is ended by a semicolon.
  • Line 2 ("initial begin") : "initial" is a  System Verilog construct simulator will start running everything written in initial block at time "0" of simulation.
  • Line 3 ("$display("Hello World");") :  "$display" is a system task in System Verilog which is used to print anything to STDOUT.
  • Line 4 ("end") : "end" signifies end of initial block.
  • Line 5  ("endmodule") : "endmodule" signifies end of module "top".