Sunday, April 7, 2013

CODE : TRAFFIC LIGHT CONTROLLER VHDL

CODE : TRAFFIC LIGHT CONTROLLER

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-- Company:
-- Engineer:
--
-- Create Date:    00:24:35 11/02/2006
-- Design Name:
-- Module Name:    tfcontroller_code - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity tfcontroller_code is
    Port ( clk : in  STD_LOGIC;
           rst : in  STD_LOGIC;
           Green : out  STD_LOGIC;
           Red : out  STD_LOGIC;
           Yellow : out  STD_LOGIC);
end tfcontroller_code;

architecture Behavioral of tfcontroller_code is

signal count:integer range 0 to 10 := 0;
signal state:integer range 0 to 2 := 0;
begin
    process(clk, rst)
    begin
        if(rst = '1') then
            state <= 0;
            Red <= '1';
            Green <= '0';
            Yellow <= '0';
            count <= 0;
        elsif clk'event and clk='1' then
        case state is
        when 0 =>  --Red Light
        if(count=5) then
            count <= 0;
            state <= 1;
        else
            count <= (count + 1);
            Red <= '1';
            Green <= '0';
            Yellow <= '0';
        end if;
       
        when 1 =>  --Green Light
        if(count=5) then
            count <= 0;
            state <= 2;
        else
            count <= count + 1;
            Red <= '0';
            Green <= '1';
            Yellow <= '0';
        end if;
       
        when 2 =>  --Yellow Light
        if(count=2) then
            count <= 0;
            state <= 0;
        else
            count <= count + 1;
            Red <= '0';
            Green <= '0';
            Yellow <= '1';
        end if;

        when others =>
            state <= 0;
            count <= 0;
        end case;
        end if;
    end process;
end Behavioral;

9 comments:

  1. can you not split the architecture that deals with all the states into three processes for state register, storing and working with current state values and one process for dealing with next values.

    ReplyDelete
  2. Could you please provide testbench for this code

    ReplyDelete
  3. Test bench generation of the code

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  4. Hello There,


    Great piece on CODE : TRAFFIC LIGHT CONTROLLER VHDL , I’m a fan of the ‘flowery’ style Looking forward to more long form articles ??

    Totally new to Linux. I am running an older Acer Aspire one laptop with a 1.6 ghtz processor and plenty of ram. I downloaded Linux Mint (Cinnamon version) along with the proper unetbootin-windows-613 to my 8gb blank USB...well, I believe it is the proper version. I did get the 32 bit as that is what my system is.
    But nice Article Mate! Great Information! Keep up the good work!


    Merci,
    Abhiram

    ReplyDelete